Transparent self-hibernation of non-volatile memory system
US8181046B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2008 |
| Grant date | May 15, 2012 |
| Priority date | — |
| Expiry date | Nov 6, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system self-initiates hibernation mode and responds to host commands issued during hibernation within a host protocol timeout period. Hibernation mode is entered after controller state data has been stored and while no host command to the memory system is pending. Power to volatile data storage is diminished during hibernation mode. Upon receiving a host command during hibernation mode, power is restored and a reduced portion of the controller state data is read from non-volatile memory. A removable data storage device or a portable electronic device with embedded data storage may be constructed with such a self-hibernating memory system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.