Low power consuming quartz oscillator circuit with active polarisation
US8183947B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 4, 2008 |
| Grant date | May 22, 2012 |
| Priority date | — |
| Expiry date | Dec 31, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B2200/0062
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The quartz oscillator circuit includes an inverter comprising two complementary PMOS and NMOS transistors (P1, N1) series-mounted with a current source (4) between two terminals of a supply voltage source to define an active branch. A source terminal of the PMOS transistor (P1) is connected to the current source, whereas a source terminal of the other NMOS transistor (N1) is connected to an earth terminal. Drain terminals of the transistors are connected at output to a first electrode (XOUT) of the quartz (3), whereas the gate terminals of the transistors are connected at input to a second electrode (XIN) of the quartz. A first phase shift capacitor (C1) is connected to the first electrode of the quartz, whereas a second capacitor (C2) is connected to the second electrode of the quartz. The oscillator circuit includes active polarisation means (2) arranged between the drain terminals and the gate terminals of the inverter transistors. These polarisation means can be a follower-mounted operational transconductance amplifier, whose impedance value is sufficiently high so as not to damage the transconductance of the active branch for generating an oscillation in the quartz.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.