Self-calibration method of a reading circuit of a nonvolatile memory
US8184490B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2009 |
| Grant date | May 22, 2012 |
| Priority date | — |
| Expiry date | Sep 7, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A self-calibration circuit of a nonvolatile memory includes a trimming data storage module, a sense amplifier module, a logic judgment module, and a scanning module. The nonvolatile memory circuit includes a memory cell array and the self-calibration circuit of the reading circuit of the nonvolatile memory. Without requiring an additional fuse or differential unit, the self-calibration circuit of a nonvolatile memory solves a deadlock problem securely and reliably without increasing circuit area and test cost, and be widely applied to OTP, MTP and EEPROM of various processes or various nonvolatile memories such as Flash EEPROM, MRAM, and FeRAM.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.