Patent · US Active

Method, design program and design support device for semiconductor integrated circuit, and semiconductor integrated circuit

US8187924B2 · kind B2 · utility

3Cited by
3References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 29, 2010
Grant dateMay 29, 2012
Priority date
Expiry dateDec 1, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/06
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A design method for a semiconductor integrated circuit, includes: a first calculating step; a second calculating step; and a setting step. The first step is a step of calculating a consumption current amount of a layout target circuit based on circuit information. The second calculating step is a step of calculating a suppliable current amount per unit area in a region where a power can be supplied from a power wiring line. The setting step is a step of setting a cell size of the layout target circuit based on the consumption current amount so that a consumption current amount per unit area of the layout target circuit is smaller than the suppliable current amount per unit area.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.