Manufacturing method for semiconductor integrated circuit device
US8187966B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2009 |
| Grant date | May 29, 2012 |
| Priority date | — |
| Expiry date | Feb 20, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1036
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A Cu-CMP step applied to processes for 130 nm, 90 nm, and 65 nm technical nodes or the like mainly employs slurry to which an anticorrosive agent is added for preventing corrosion of Cu wiring. The inventors of the present application have studied and clearly found that in the Cu-CMP step using the slurry with the anticorrosive agent added thereto, the anticorrosive agent often forms complexes with Cu, which remain as foreign matter on a wafer in large quantity, leading to a reduction in yield, and in reliability of TDDB characteristics of the Cu wiring. In the invention of the present application, a post-CMP cleaning process involves applying wet cleaning to a wafer by supplying a cleaning solution, such as a chemical solution or pure water, to a device surface of the wafer substantially in a vertical direction with respect to the horizontal device surface, while rotating the wafer substantially about its center in the horizontal plane. The rotation speed of the wafer is set low such that the thickness of the cleaning solution over the entire device surface becomes substantially uniform.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.