Techniques for current mirror circuits
US8188792B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2010 |
| Grant date | May 29, 2012 |
| Priority date | — |
| Expiry date | Sep 24, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45244
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A circuit includes a current mirror circuit and first and second transistors coupled as a differential pair. A first input voltage is provided to a control input of the first transistor. A second input voltage is provided to a control input of the second transistor. The current mirror circuit includes a third transistor, a fourth transistor coupled to the third transistor, and a fifth transistor coupled in series with the fourth transistor. The third transistor provides a current through the differential pair that is proportional to a current through the fourth transistor. A control input of the fourth transistor is coupled between the fifth transistor and a source of current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.