Delay circuit for low power ring oscillator
US8188801B2 · kind B2 · utility
5Cited by
1References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2010 |
| Grant date | May 29, 2012 |
| Priority date | — |
| Expiry date | Nov 27, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/012
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a delay circuit for a low power ring oscillator. The delay circuit includes: a pair of N type transistors that receive first differential input signals Vin1+ and Vin1−; a pair of P type transistors that receive second differential input signals Vin2+ and Vin2−; a differential output terminal that outputs differential output signals Vout+ and Vout− generated from the pair of N type transistors and the pair of P type transistors; an N type detector that supplies a body voltage to the pair of N type transistors; and a P type detector that supplies a body voltage to the pair of P type transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.