Methods and apparatus for operating a digital communications interface

US8189726B2 · kind B2 · utility

Assignee

• Qimonda AG · DE

Inventors

• Franz Weiss · Dachau, DE
• Daniel Kehrer · Eferding, AT

Key dates

• Filing date: Mar 5, 2008
• Grant date: May 29, 2012
• Expiry date: Mar 30, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04J3/0685
• WIPO field: Telecommunications
• WIPO sector: Electrical engineering

Abstract

Embodiments of the invention relate to integrated circuits comprising inputs for receiving an input signal and a plurality of clock signals having a predetermined phase relationship. The integrated circuit may include a plurality of track-and-hold devices and a plurality of slicer devices. Signal outputs of two track-and-hold devices may be coupled to signal inputs of one slicer device, one of the two track-and-hold devices and the slicer device being coupled to a first input configured to receive a first clock signal and the other track-and-hold device being coupled to a second input being configured to receive a second clock signal.