Coupling data for interrupt processing in a parallel processing environment
US8190855B1 · kind B1 · utility
9Cited by
17References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2008 |
| Grant date | May 29, 2012 |
| Priority date | — |
| Expiry date | Jun 3, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/101
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit comprises a plurality of tiles. Each tile comprises a processor, and a switch including switching circuitry to forward data received over data paths from other tiles to the processor and to switches of other tiles, and to forward data received from the processor to switches of other tiles. The integrated circuit further comprises one or more interface modules including circuitry to transfer data to and from a device external to the tiles; and a sub-port routing network including circuitry to route data between a port of a switch and a plurality of sub-ports coupled to one or more interface modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.