Method and system for distributing a global timebase within a system-on-chip having multiple clock domains
US8190942B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2008 |
| Grant date | May 29, 2012 |
| Priority date | — |
| Expiry date | Feb 13, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A global timebase system and method for a system-on-chip synchronizes multiple clock domains in each of a plurality of receiver modules by broadcasting a global timebase count value as Gray code over a global timebase bus. A global timebase generator includes a binary counter and a binary-to-Gray-code converter. Each receiver module registers the global timebase count value with its own local clock and includes a Gray-code-to-binary converter. The converted value, in binary form, may be used as least significant bits of a globally synchronized local timebase. Most significant bits may be generated by a local binary counter incremented at each 1-to-0 transition of the most significant bit of the global timebase count value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.