Sparse vectorization without hardware gather/scatter
US8191056B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2006 |
| Grant date | May 29, 2012 |
| Priority date | — |
| Expiry date | Mar 28, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/447
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A target operation in a normalized target loop, susceptible of vectorization and which may, after compilation into a vectorized form, seek to operate on data in nonconsecutive physical memory, is identified in source code. Hardware instructions are inserted into executable code generated from the source code, directing a system that will run the executable code to create a representation of the data in consecutive physical memory. A vector loop containing the target operation is replaced, in the executable code, with a function call to a vector library to call a vector function that will operate on the representation to generate a result identical to output expected from executing the vector loop containing the target operation. On execution, a representation of data residing in nonconsecutive physical memory is created in consecutive physical memory, and the vectorized target operation is applied to the representation to process the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.