Interleaving with iterative calculation of interleaving addresses
US8194527B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2005 |
| Grant date | Jun 5, 2012 |
| Priority date | — |
| Expiry date | Aug 7, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/276
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and a device (4) for block interleaving of size K with N iterations of index j, N being greater than or equal to 1, of input digital data items indexed by a variable k={0, . . . , K−1}. The interleaving method uses a turbo structure that has two inputs and one output. At the end of each iteration j, the interleaving law I(j)(k) at the output of the interleaver (4) is modified in accordance with an input sequence formed by the position indices of the data items before interleaving (typically a ramp) and in accordance with an interleaved sequence (which provides the position of the data items after interleaving) resulting from the previous iteration of the same interleaving algorithm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.