Identification of potentially erroneous and/or erased data
US8196001B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2009 |
| Grant date | Jun 5, 2012 |
| Priority date | — |
| Expiry date | Nov 19, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2020/1836
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Systems for identifying potentially erroneous and/or erased data are provided. Systems have a bit detector, an accumulator, and a data reconstruction processor. The bit detector assigns values to bits read in a data signal. The bit detector illustratively assigns multiple values to each of the bits. The accumulator accumulates a count of the multiple values assigned by the bit detector for each of the bits. The accumulator associates each bit with a particular value based at least in part on its accumulated count. The data reconstruction processor determines for each of the bits a confidence level of the particular value associated to it. The data reconstruction process sets flags for a portion of the bits. The flags identify the portion of the bits as possible erased or erroneous data. The flags are set based at least in part on the confidence levels of the portion of the bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.