Nonvolatile memory devices having variable-resistance memory cells and methods of programming the same
US8199603B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2009 |
| Grant date | Jun 12, 2012 |
| Priority date | — |
| Expiry date | Aug 23, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Nonvolatile memory devices include an array of variable-resistance memory cells and a write driver electrically coupled to the array. The write driver is configured to drive a bit line in the array of variable-resistance memory cells with a stair-step sequence of at least two unequal bit line voltages during an operation to program a variable-resistance memory cell in said array. This stair-step sequence of at least two unequal bit line voltages includes a precharge voltage (e.g., Vcc-Vth) at a first step and a higher boosted voltage (e.g., Vpp-Vth) at a second step that follows the first step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.