Computing circuits and method for running an MPEG-2 AAC or MPEG-4 AAC audio decoding algorithm on programmable processors
US8200730B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2010 |
| Grant date | Jun 12, 2012 |
| Priority date | — |
| Expiry date | Sep 13, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG10L19/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to computing circuits and method for running an MPEG-2 AAC or MPEG-4 AAC algorithm efficiently, which is used as an audio compression algorithm in multi-channel high-quality audio systems, on programmable processors. In accordance with the present invention, the IMDCT process which takes large part of the amount of the operations in implementation of an MPEG-2/4 AAC algorithm can be performed in efficient. In addition, while the architecture of the existing digital signal processor is still used, the performance can be improved by means of the addition of the architecture of the address generator, Huffman decoder, and bit processing architecture. After all, to design and change the programmable processor is facilitated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.