Hardware task manager
US8200799B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2009 |
| Grant date | Jun 12, 2012 |
| Priority date | — |
| Expiry date | Jun 14, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hardware task manager for managing operations in an adaptive computing system. The task manager indicates when input and output buffer resources are sufficient to allow a task to execute. The task can require an arbitrary number of input values from one or more other (or the same) tasks. Likewise, a number of output buffers must also be available before the task can start to execute and store results in the output buffers. The hardware task manager maintains a counter in association with each input and output buffer. For input buffers, a negative value for the counter means that there is no data in the buffer and, hence, the respective input buffer is not ready or available. Thus, the associated task can not run. Predetermined numbers of bytes, or “units,” are stored into the input buffer and an associated counter is incremented. When the counter value transitions from a negative value to a zero the high-order bit of the counter is cleared, thereby indicating the input buffer has sufficient data and is available to be processed by a task.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.