Variable space page mapping method and apparatus for flash memory device
US8200889B2 · kind B2 · utility
5Cited by
0References
21Claims
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Key dates
| Filing date | Oct 1, 2009 |
| Grant date | Jun 12, 2012 |
| Priority date | — |
| Expiry date | Aug 11, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7202
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method and apparatus embodying a flash translation layer (FTL) in a storage device including a flash memory. The FTL may classify a block into a sequential group and a fusion group based on a locality of a write request. The FTL may store data in blocks of the fusion group by using a page mapping scheme, and sequentially store data by using a block mapping scheme. The FTL may improve efficiency of garbage collection operation that is performed by using limited redundant blocks and also may increase efficiency of a non-sequential reference operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.