Patent · US Active

Computer wake up circuit includes a switch configured to prevent a control signals from an I/O controller being transmitted to south-bridge

US8200997B2 · kind B2 · utility

1Cited by
3References
14Claims
0Family size

Assignees

Inventor

Key dates

Filing dateAug 26, 2009
Grant dateJun 12, 2012
Priority date
Expiry dateAug 24, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F1/3215
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A computer wake up circuit includes a first control circuit and a second control circuit. The first control circuit has an input terminal configured to receive a first control signal from a first serial device, and an output terminal coupled to a south bridge which is capable of waking up a computer. The second control circuit has an input terminal respectively coupled to a second serial device and an I/O controller, and an output terminal coupled to the south bridge. The second control circuit receives a second control signal from the second serial device. The first and second control circuits respectively outputs a wake up signal to the south bridge to wake up the computer according to the control signals. The I/O controller communicates with the second serial device through the second control circuit, and outputs other control signals to control operations of the second serial device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.