Patent · US Active

Managing memory faults

US8201024B2 · kind B2 · utility

84Cited by
12References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 17, 2010
Grant dateJun 12, 2012
Priority date
Expiry dateMay 17, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/0793
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Embodiments are described for managing memory faults. An example system can include a memory controller module to manage memory cells and report memory faults. An error buffer module can store memory fault information received from the memory controller. A notification module can be in communication with the error buffer module. The notification module may generate a notification of a memory fault in a memory access operation. A system software module can provide services and manage executing programs on a processor. In addition, the system software module can receive the notifications of the memory fault for the memory access operation. A notification handler may be activated by an interrupt when the notification of the memory fault in the memory access operation is received.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.