Fault-resistant just-in-time compiler
US8201026B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2011 |
| Grant date | Jun 12, 2012 |
| Priority date | — |
| Expiry date | Sep 30, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1497
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to techniques for potentially increasing the reliability and/or stability of systems having virtual machines that support multiple modes of execution. For example, as described herein, a virtual machine partitions a plurality of program instructions into a plurality of traces for execution by a virtual machine operating on a computing device, wherein the virtual machine has first and second modes of execution, and wherein each of the plurality of traces comprises one or more of the plurality of program instructions. The virtual machine applies the second mode of execution to a first trace in the plurality of traces and determines an error condition that is caused by the application of the second mode of execution to the first trace. After determining the error condition, the virtual machine applies the first mode of execution to the first trace to recover the virtual machine from the error condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.