Method for detecting short burst errors in LDPC system
US8201051B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2008 |
| Grant date | Jun 12, 2012 |
| Priority date | — |
| Expiry date | Apr 1, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/17
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention is a device for detecting short burst errors. The device includes a first signal input, wherein the first signal input is configured to receive a first signal. The device includes a second signal input, wherein the second signal input is configured to receive a second signal. The device includes a logic gate, wherein the logic gate is operable for receiving the first signal vial the first signal input, receiving the second signal via the second signal input, and generating a logic output gate signal based on the received first signal and the second signal. Furthermore, the device includes a filter, wherein the filter is configured for receiving the logic output gate signal from the logic gate and generates a filter output signal based upon the received logic output gate signal, wherein the filter output signal is operable for flagging errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.