Vertical channel thin-film transistor and method of manufacturing the same
US8203662B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2009 |
| Grant date | Jun 19, 2012 |
| Priority date | — |
| Expiry date | Aug 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/00
Abstract
Provided is a thin-film transistor (TFT) substrate. The TFT substrate includes: an insulating substrate; a semiconductor pattern which is formed on the insulating substrate, the semiconductor pattern having a top surface and a bottom surface; a source electrode and a drain electrode which are disposed on the top and bottom surfaces of the semiconductor pattern, respectively; a gate electrode which is disposed alongside the semiconductor pattern with a gate insulating film interposed therebetween; a data line which is connected to the source electrode and extends in a first direction; a gate line which is connected to the gate electrode and extends in a second direction; and a pixel electrode which is connected to the drain electrode and is formed in a pixel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.