Write current compensation using word line boosting circuitry
US8203893B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2011 |
| Grant date | Jun 19, 2012 |
| Priority date | — |
| Expiry date | Aug 16, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0071
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus and method for write current compensation in a non-volatile memory cell, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM). In accordance with some embodiments, a non-volatile memory cell has a resistive sense element (RSE) coupled to a switching device, the RSE having a hard programming direction and an easy programming direction opposite the hard programming direction. A voltage boosting circuit includes a capacitor which adds charge to a nominal non-zero voltage supplied by a voltage source to a node to generate a temporarily boosted voltage. The boosted voltage is applied to the switching device when the RSE is programmed in the hard programming direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.