Method for producing parity check matrix for low complexity and high speed decoding, and apparatus and method for coding low density parity check code using the same
US8205131B2 · kind B2 · utility
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15Claims
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Key dates
| Filing date | May 1, 2008 |
| Grant date | Jun 19, 2012 |
| Priority date | — |
| Expiry date | Apr 20, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/611
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided are a method for producing a parity check matrix for low complexity and high speed decoding, and an apparatus and method for coding a Low Density Parity Check (LDPC) code using the same. The method includes: calculating a cyclic shift value of a subblock to a matrix; and when the calculated cyclic shift values of the subblock are arrayed in the matrix, producing a parity check matrix by arraying the cyclic shift values of the subblock except ‘0 matrix’ without duplication to any one column.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.