Pixel structure having shielded storage node
US8207485B2 · kind B2 · utility
4Cited by
16References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 28, 2009 |
| Grant date | Jun 26, 2012 |
| Priority date | — |
| Expiry date | Mar 24, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/802
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A pixel structure having a shielded storage node. A pixel comprises a sample transistor coupled to a light detecting stage. The sample transistor comprises an inner junction region surrounding and coupled to a storage node and a gate disposed around at least three sides of the inner junction region that operates as a charge barrier to shield the storage node. A memory capacitor is coupled to the storage node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.