ADPLL circuit, semiconductor device, and portable information device
US8207767B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2010 |
| Grant date | Jun 26, 2012 |
| Priority date | — |
| Expiry date | Dec 28, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides ABS precision improving means under ADPLL environment or environment close to the ADPLL environment and realizes shortening of process time of the ABS. In a digital frequency comparator in an ABS circuit, a DFF for storing an initial phase difference in a DPE signal output from a DPFD is prepared. Immediately after start of ABS operation, a DPE signal output from the DPFD is recorded as a signal expressing an initial phase difference in an internal circuit of the DPFD into the DFF. After that, the digital frequency comparator performs ABS by using a signal obtained by subtracting the initial phase error recorded in the DFF from an input DPE signal, thereby realizing high-speed and stabilized ABS operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.