Patent · US Active

Method and apparatus for MOSFET drain-source leakage reduction

US8207784B2 · kind B2 · utility

3Cited by
53References
22Claims
0Family size

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Inventor

Key dates

Filing dateFeb 12, 2009
Grant dateJun 26, 2012
Priority date
Expiry dateFeb 12, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/0013
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

A method and apparatus is taught for reducing drain-source leakage in MOS circuits. In an exemplary CMOS inverter, a first transistor causes the body of an affected transistor to be at a first body potential. A second transistor brings the body potential of the affected transistor to a second body potential by providing an accurate body voltage from a body voltage source. Exemplary body bias voltage sources are further described that can drive one or more gate transistors of different gate circuits.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.