Phase locked loop and phase-frequency detector
US8207792B2 · kind B2 · utility
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2References
14Claims
0Family size
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Key dates
| Filing date | Oct 5, 2010 |
| Grant date | Jun 26, 2012 |
| Priority date | — |
| Expiry date | Oct 5, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/191
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The phase-frequency detector (PFD) includes a frequency detector (FD) arranged to receive orthogonal signal pairs of a reference signal and a feedback signal and estimate a frequency error between a reference signal and a feedback signal; a FD voltage-to-current converter arranged to convert the frequency error into a first current; a phase detector (PD) arranged to receive the orthogonal signal pairs and estimate a phase error between the reference signal and the feedback signal, and a PD voltage-to-current converter arranged to convert the phase error into a second current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.