Semiconductor memory device and method of operating the same
US8208309B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 25, 2010 |
| Grant date | Jun 26, 2012 |
| Priority date | — |
| Expiry date | Jan 11, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device, in which flag data read of a flag data region is performed during data write, comprises: a nonvolatile memory cell array having an ordinary data region and the flag data region allocated to a one page range in which read and write are simultaneously performed; and a one page amount of sense amplifiers, each of the sense amplifiers comprising a data latch for retaining write data. During read of the flag data by the sense amplifier circuit, in the case of one of the sense amplifiers corresponding to the flag data region, read flag data is transferred to the data latch. In the case of one of the sense amplifiers corresponding to the ordinary data region, write data retained by the data latch is rewritten regardless of read cell data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.