Write timeout control methods for flash memory and memory devices using the same
US8209475B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 3, 2010 |
| Grant date | Jun 26, 2012 |
| Priority date | — |
| Expiry date | Jan 19, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7205
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A write timeout control method for a flash memory having a plurality of spare blocks and data blocks including a plurality of mother blocks is disclosed. The method includes the steps of: receiving a write command and a starting logical block address; determining an update mode according to a target mother block linked to the starting logical block address; determining whether a pre-clean operation is performed on a first mother block; if so, performing a post-clean operation on the first mother block during a first time period; re-configuring the first mother block as a spare block; performing a programming process to write data on the target mother block; determining whether the number of mother blocks exceeds a first threshold; and if so, performing the pre-clean operation on a second mother block. The first and second mother blocks are configured as blocks to be cleaned.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.