Software verification using hybrid explicit and symbolic model checking
US8209667B2 · kind B2 · utility
6Cited by
11References
21Claims
0Family size
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Key dates
| Filing date | Jan 11, 2006 |
| Grant date | Jun 26, 2012 |
| Priority date | — |
| Expiry date | Aug 19, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/44589
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method for verifying a target system includes defining a specification including properties applicable to the target system. Execution sequences of the target system are identified. A set of the execution sequences is grouped into an equivalence class characterized by a common control flow. A symbolic representation of the equivalence class is evaluated so as to verify a compliance of the set of the execution sequences with one or more of the properties.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.