Method and apparatus for providing system clock failover
US8212601B2 · kind B2 · utility
5Cited by
4References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 29, 2010 |
| Grant date | Jul 3, 2012 |
| Priority date | — |
| Expiry date | Feb 22, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for providing system clock failover using a one-shot circuit are disclosed. A process, in one embodiment, is able to detect a clock failure using a one-shot circuit, wherein the clock signals are generated by a first clock circuit. Upon generating a switching signal in response to the clock failure, a system reset signal is asserted for a predefined time period in accordance with the clock failure. After switching a second clock circuit to replace the first clock circuit, the process is capable of resuming the clock signals via the second clock circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.