Patent · US Active

Techniques for digital loop filters

US8212610B2 · kind B2 · utility

4Cited by

7References

26Claims

0Family size

Assignee

Altera Corporation · US

Inventors

William W. Bereza · Ottawa, CA
Mohsen Moussavi · Ottawa, CA
Charles E. Berndt · Ottawa, CA

Key dates

Filing date	Nov 17, 2008
Grant date	Jul 3, 2012
Priority date	—
Expiry date	May 20, 2029

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/099
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A digital loop filter includes a fine control circuit and a coarse control circuit. The fine control circuit adjusts a phase of a feedback clock signal by a first phase adjustment in response to a first phase error signal that indicates a sign of a phase error between a reference clock signal and the feedback clock signal. The coarse control circuit adjusts the phase of the feedback clock signal by a second phase adjustment in response to a second phase error signal. The second phase adjustment is larger than the first phase adjustment. The second phase error signal indicates a magnitude of a phase error between the reference clock signal and the feedback clock signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.