Methods and apparatus for indexing memory of a network processor
US8213428B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2003 |
| Grant date | Jul 3, 2012 |
| Priority date | — |
| Expiry date | Apr 3, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3009
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method is provided for address mapping in a network processor. The method includes the steps of (1) determining a port number of a port that receives a data cell; (2) determining a virtual path identifier and a virtual channel identifier for the data cell; and (3) creating a first index based on at least one of the port number, the virtual path identifier and the virtual channel identifier. The method further includes (1) accessing one of a plurality of entries stored in a first on-chip memory using the first index; (2) creating a second index based on the accessed entry of the first on-chip memory; and (3) accessing an entry of a second memory based on the second index. Numerous other aspects are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.