Digital timing correction system, method and apparatus
US8213558B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2008 |
| Grant date | Jul 3, 2012 |
| Priority date | — |
| Expiry date | Mar 28, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0012
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The method and system of digital timing correction in a digital baseband communication system is disclosed. In one embodiment, a method includes receiving samples at a predetermined time interval based on a current clock signal of a receiver clock, reading in a prompt sample of the received samples and a successor sample of the received samples based on a control signal, interpolating a projected sample based on the prompt sample, the successor sample and a predetermined time offset, determining the time offset for interpolation, by accumulating sampling frequency offset between the receiver clock and a reference clock, relative to a sample timing of the prompt sample, resulting in an interpolated data sample rate reduced by an integer multiple factor compared to a received sample rate and receiving a next sample of the received samples based on the current clock signal of the receiver clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.