Method of forming STI regions in electronic devices
US8216896B2 · kind B2 · utility
0Cited by
13References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2006 |
| Grant date | Jul 10, 2012 |
| Priority date | — |
| Expiry date | Feb 12, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76237
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method of manufacturing integrated circuits and in particular to the step of forming shallow trench isolation (STI) zones. The method according to the present invention leads to electronic devices and to integrated circuits having reduced narrow width effect and edge leakage. This is achieved by performing an extra implantation step near the edge of the STI zone, after formation of the STI zones.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.