Low power fast level shifter
US8217703B2 · kind B2 · utility
4Cited by
8References
36Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 30, 2010 |
| Grant date | Jul 10, 2012 |
| Priority date | — |
| Expiry date | Sep 16, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018528
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A lever shifter is provided for receiving a signal in a first voltage domain and providing an output signal in a second voltage domain. The level shifter reduces propagation delay and power consumption by mitigating contention between NFETs and PFETs during signal propagation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.