Gigabit ethernet adapter
US8218555B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2002 |
| Grant date | Jul 10, 2012 |
| Priority date | — |
| Expiry date | Aug 16, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/16
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A gigabit Ethernet adapter provides a provides a low-cost, low-power, easily manufacturable, small form-factor network access module which has a low memory demand and provides a highly efficient protocol decode. The invention comprises a hardware-integrated system that both decodes multiple network protocols in a byte-streaming manner concurrently and processes packet data in one pass, thereby reducing system memory and form factor requirements, while also eliminating software CPU overhead. A preferred embodiment of the invention comprises a plurality of protocol state machines that decode network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, Raw Socket, RARP, ICMP, IGMP, iSCSI, RDMA, and FCIP concurrently as each byte is received. Each protocol handler parses, interprets, and strips header information immediately from the packet, requiring no intermediate memory. The invention provides an Internet tuner core, peripherals, and external interfaces. A network stack processes, generates and receives network packets. An internal programmable processor controls the network stack and handles any other types of ICMP packets, IGMP packets, or packets corresponding to other …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.