Shift register receiving all-on signal and display device
US8223112B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2008 |
| Grant date | Jul 17, 2012 |
| Priority date | — |
| Expiry date | Mar 11, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0291
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
At least one embodiment of the present invention is directed to, even when external noise is applied to a shift register during all-on operation, preventing through-current from flowing in unit circuits and also to prevent increase in load on all-on control signal lines. When a high-level all-on control signal is provided to a unit circuit of a shift register, a transistor T3 is brought into off-state, so that a transistor T2 cannot output an on-voltage to a first output terminal. However, a transistor T24 is brought into on-state, so that the first output terminal outputs an on-voltage to the exterior. On the other hand, a transistor T32 is brought into on-state, so that a second output terminal outputs an off-voltage to a unit circuit 11 in the next stage. At this time, the transistor T3 is kept in off-state, so that no through-current flows to the transistors T24 and T3.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.