Mapping address bits to improve spread of banks
US8225027B2 · kind B2 · utility
3Cited by
10References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 30, 2011 |
| Grant date | Jul 17, 2012 |
| Priority date | — |
| Expiry date | Jun 30, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1652
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device may include a group of requestors issuing requests, a memory that includes a set of memory banks, and a control block. The control block may receive a request from one of the requestors, where the request includes a first address. The control block may perform a logic operation on a high order bit and a low order bit of the first address to form a second address, identify one of the memory banks based on the second address, and send the request to the identified memory bank.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.