Apparatus and methods for time-multiplex field-programmable gate arrays with multiple clocks
US8225259B1 · kind B1 · utility
10Cited by
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31Claims
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Key dates
| Filing date | May 16, 2005 |
| Grant date | Jul 17, 2012 |
| Priority date | — |
| Expiry date | Apr 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17796
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multiple-clock time-multiplexed field programmable gate array (TM-FPGA) includes programmable logic circuitry. A plurality of clock signals within the TM-FPGA couple to the programmable logic circuitry. A user's circuit can be mapped to the programmable logic circuitry without the user's intervention in mapping the circuit to the programmable logic circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.