Method for fabricating electrical bonding pads on a wafer
US8227332B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2008 |
| Grant date | Jul 24, 2012 |
| Priority date | — |
| Expiry date | Apr 4, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating electrical bonding pads on one face of a wafer includes the production of electrically conductive areas and electrical connection branches connecting these conductive areas. A layer of mask material is deposited and openings are produced in this mask layer which extend above said conductive areas and at least some of which extend at least partly beyond the peripheral edges of the underlying conductive areas. Blocks made of a solder material are produces in the openings by electrodeposition in a bath. The mask material is then removed along with the connection branches. The wafer is passed through or placed in an oven so as to shape, on the conductive areas, the blocks into substantially domed electrical bonding pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.