Method of forming semiconductor device patterns
US8227354B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2009 |
| Grant date | Jul 24, 2012 |
| Priority date | — |
| Expiry date | Oct 17, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/30
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a method of forming patterns of a semiconductor device, whereby patterns having various widths can be simultaneously formed, and pattern density can be doubled by a double patterning process in a portion of the semiconductor device. In the method of forming patterns of a semiconductor device, a first mold mask pattern and a second mold mask patter having different widths are formed on a substrate. A pair of first spacers covering both sidewalls of the first mold mask pattern and a pair of second spacers covering both sidewalls of the second mold mask pattern are formed. The first mold mask pattern and the second mold mask pattern are removed, and a wide-width mask pattern covering the second spacer is formed. A lower layer is etched using the first spacers, the second spacers, and the wide-width mask pattern as an etch mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.