High speed fully differential resistor-based level formatter
US8228108B2 · kind B2 · utility
1Cited by
5References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2010 |
| Grant date | Jul 24, 2012 |
| Priority date | — |
| Expiry date | Oct 7, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/151
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A level formatter is provided that has differentially coupled closed loop current sources, each configured to precisely establish a current proportional to a reference voltage. A bridge circuit is differentially coupled to two supplementary current sources and controlled to rapidly switch the current from the supplementary current sources to produce output voltages at respective outputs that are approximately equal to respective one of two reference voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.