D-class digital amplifier configured for shaping non-idealities of an output signal
US8228222B2 · kind B2 · utility
0Cited by
12References
20Claims
0Family size
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Key dates
| Filing date | Dec 15, 2010 |
| Grant date | Jul 24, 2012 |
| Priority date | — |
| Expiry date | Jan 24, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/2175
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The disclosure relates to an amplifier comprising a digital delta-sigma modulator, a quantifier receiving a signal supplied by a delta-sigma stage and supplying a quantified signal, and a power circuit supplying an output signal. The device comprises N state loops of a first type configured to send the output signal to adders of N delta-sigma stages of lower rank, each state loop of the first type comprising an analog low-pass filter for supplying a filtered output signal, and an analog to digital converter for supplying a digital filtered output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.