System and method for temporal load balancing across GPUs
US8228337B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2008 |
| Grant date | Jul 24, 2012 |
| Priority date | — |
| Expiry date | May 25, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2210/56
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention sets forth a method for dynamically load balancing rendering operations across an IGPU and a DGPU. For each frame, the graphics driver configures the IGPU to pre-compute Z-values for a portion of the display surface and to write feedback data to the system memory indicating the time that the IGPU used to process the frame. The graphics driver then configures the DGPU to use the pre-computed Z-values while rendering to the complete display surface and to write feedback data to the system memory indicating the time that the DGPU used to process the frame. The graphics driver uses the feedback data from the IGPU and DGPU in conjunction with the percentage of the display surface that the IGPU Z-rendered for the frame to scale the portion of the display surface that the IGPU Z-renders for one or more subsequent frames. In this fashion, overall processing within the graphics pipeline is optimized across the IGPU and DGPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.