Liquid crystal display and thin film transistor array panel therefor
US8228452B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2009 |
| Grant date | Jul 24, 2012 |
| Priority date | — |
| Expiry date | Dec 3, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/134345
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A thin film transistor array panel is provided, which includes: an insulating substrate; a gate line formed on the substrate and including a gate electrode; a gate insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer opposite the gate electrode; a data line formed on the gate insulating layer and including a first source electrode located on the semiconductor layer; first and second drain electrodes formed on the semiconductor layer, separated from each other and overlapping the gate electrode; a passivation layer formed on the data line and the first and second drain electrodes; and first and second pixel electrodes electrically connected to the first and second electrodes, respectively, wherein an overlapping area between the gate electrode and the first drain electrode is different from an overlapping area between the gate electrode and the second drain electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.