Multiple power mode system and method for memory
US8230239B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2009 |
| Grant date | Jul 24, 2012 |
| Priority date | — |
| Expiry date | Jun 29, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory power management system and method supporting multiple power modes for powering memory channels. The power management system can include a memory controller that controls the memory channel; a throughput detector that detects a requested throughput of the memory channel; a power control logic that determines a desired power mode corresponding to the requested throughput; and a power control device that supplies a desired voltage of the desired power mode to the memory channel. The power management system can include multiple memory controllers for controlling a multi-channel memory independently. The method includes detecting a requested throughput for the memory channel; determining a desired voltage related to the requested throughput; requesting the desired voltage from a voltage device; and applying the desired voltage to the memory channel. In some embodiments, the method only applies the desired voltage if it does not change for a threshold time duration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.