Testing and debugging of dynamic binary translation
US8230402B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2007 |
| Grant date | Jul 24, 2012 |
| Priority date | — |
| Expiry date | May 24, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45504
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for testing and debugging of dynamic binary translation wherein a dynamic binary translator allows a target binary to be executed transparently on a host machine having a different computer architecture than the target machine involves selecting a minimum set of target machine states for simulation at run-time. A series of target machine instructions from the target binary is translated into a series of host machine instructions. During translation, a plurality of check points are inserted into the series of host machine instructions. During translation, a plurality of verification points are inserted into the series of host machine instructions. The series of host machine instructions, including the check points and verification points, are executed. Execution of a check point determines a simulated target machine state. Execution of a verification point sends information pertaining to simulated target machine states to an external verifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.