Self-aligned silicon carrier for optical device supporting wafer scale methods
US8232142B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2009 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Nov 16, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/02255
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Disclosed is a carrier assembly for and a method of manufacturing an optical device. The method comprises providing a silicon substrate; attaching a number of optical dies on the silicon substrate to form an optical device carrier assembly; providing a corresponding number of through holes in the silicon substrate to permit the passage of light therethrough and further providing guide holes in the silicon substrate to present means for passive alignment of an external optical connection; and dicing the optical device carrier assembly to form individual optical devices. Preferably, the step of attaching a number of optical dies comprises using self-alignment of solder bumps using gaseous flux, the through holes are dry etched into the silicon substrate, and/or the volume between the optical die and silicon substrate is filled with a transparent polymer. Preferably, the transparent polymer is silicone rubber or epoxy. Preferably, the optical dies have a polymer mass to assist the heat transfer to the silicon substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.